1. Field of the Invention
This application claims priority from Japanese Patent Application No. 2003-130806, filed May 8, 2003, the entire contents of which are herein incorporated by reference to the extent allowed by law.
The present invention relates to a method of producing a TAB tape carrier and, more particularly, to a method of producing a TAB tape carrier used for mounting an electronic component by the TAB method.
2. Description of the Prior Art
The TAB tape carrier is widely used for mounting the electronic device comprising a semiconductor device and the like by the TAB (tape automated bonding) method. The TAB tape carrier usually has a plurality of wiring patterns designed for mounting the electronic device which are spaced apart from each other at a predetermined space along a longitudinal direction of the TAB tape carrier.
The TAB tape carrier is usually produced in the following steps. First, a wide elongate board comprising a metal supporting layer and an insulating layer laminated on the metal supporting layer is prepared. Then, after wiring patterns of conductor layer are formed in lines on the insulating layer of the elongate board, they are slit into individual lines of wiring patterns in the final stage.
Japanese Patent No. 3356076 proposes a method of producing a flexible printed wiring board, which comprises the steps: (a) after a film of polyimide varnish is formed on a sheet conductor layer by casting in a roll-to-roll process, the polyimide varnish is cured, thereby forming an insulating layer of the polyimide film, (b) a plurality of lines of wired circuits, each having a plurality of wired circuits, are formed on the sheet conductor layer by etching in the roll-to-roll process, while also, slit grooves are formed between adjacent lines of wired circuits by etching in the roll-to-roll process to expose the polyimide film from the slit grooves, (c) a coverlay is formed over the conductor layer including the wired circuits in such a manner as not to cover the slit grooves in the roll-to-roll process, and (d) the plurality of lines of wired circuits are divided into each individual line of wired circuits along the slit grooves by use of a nip roll in the roll-to-roll process.
In this method of JP Patent No. 3356076 cited above, since after a film of polyimide varnish is formed on the sheet conductor layer by casting, the polyimide varnish is cured, thereby forming an insulating layer of the polyimide film, the conductor layer is given a heat history of 300° C. or more when the polyimide varnish is cured.
The conductor layer is usually formed of copper foil having good electric properties, inexpensiveness and ready availability. The copper foil is however annealed at the temperature at which the polyimide varnish is cured, so that it is decreased in yield point, so that the plastic deformation is easily incurred by an external force.
Due to this, when the conductor layer as was given the heat history is slit to split the lines of wired circuits into each individual line of wired circuits along the slit grooves by use of the nip roll, it is undulated at the split end surfaces thereof and is sometimes torn thereat. This problem becomes outstanding particularly in the application to a circuit requiring a fine wiring pattern such as COF (chip on film), because the conductor layer used has a very small thickness.
Also, Japanese Patent No. 3356076 cited above describes that a carrier sheet is formed on an insulating layer at the opposite side to the conductor layer via adhesive. However, the use of the adhesive provides limited heat-resistance temperature and limited chemical resistance caused by the adhesive properties and also provides the disadvantage that an adhesive flash is produced at an end surface of the insulating layer when split or the adhesive remaining on the carrier sheet after split causes deterioration in reliability of the wired circuit.